core::arch::hexagon::v128 - Rust
Description: HVX intrinsics for 128-byte vector mode (1024-bit vectors) Hexagon HVX 128-byte vector mode intrinsics

Skip to main content

## Module v128

Source
🔬This is a nightly-only experimental API. (`stdarch_hexagon` #151523)
Available on Hexagon only.
Expand description

HVX intrinsics for 128-byte vector mode (1024-bit vectors) Hexagon HVX 128-byte vector mode intrinsics

This module provides intrinsics for the Hexagon Vector Extensions (HVX) in 128-byte vector mode (1024-bit vectors).

HVX is a wide vector extension designed for high-performance signal processing. Hexagon HVX Programmer’s Reference Manual

### §Vector Types

In 128-byte mode:

- `HvxVector` is 1024 bits (128 bytes) containing 32 x 32-bit values
- `HvxVectorPair` is 2048 bits (256 bytes)
- `HvxVectorPred` is 1024 bits (128 bytes) for predicate operations

To use this module, compile with `-C target-feature=+hvx-length128b`.

### §Naming Convention

Function names preserve the original Q6 naming case because the convention uses case to distinguish register types:

- `W` (uppercase) = vector pair (`HvxVectorPair`)
- `V` (uppercase) = vector (`HvxVector`)
- `Q` (uppercase) = predicate (`HvxVectorPred`)
- `R` = scalar register (`i32`)

For example, `Q6_W_vcombine_VV` operates on a vector pair while `Q6_V_hi_W` extracts a vector from a pair.

### §Architecture Versions

Different intrinsics require different HVX architecture versions. Use the appropriate target feature to enable the required version:

- HVX v60: `-C target-feature=+hvxv60` (basic HVX operations)
- HVX v62: `-C target-feature=+hvxv62`
- HVX v65: `-C target-feature=+hvxv65` (includes floating-point support)
- HVX v66: `-C target-feature=+hvxv66`
- HVX v68: `-C target-feature=+hvxv68`
- HVX v69: `-C target-feature=+hvxv69`
- HVX v73: `-C target-feature=+hvxv73`
- HVX v79: `-C target-feature=+hvxv79`

Each version includes all features from previous versions.

## Structs§

HvxVectorExperimental
  HVX vector type (1024 bits / 128 bytes)
HvxVectorPairExperimental
  HVX vector pair type (2048 bits / 256 bytes)
HvxVectorPredExperimental
  HVX vector predicate type (1024 bits / 128 bytes)

## Functions§

Q6_Q_and_QQ⚠Experimental
  `Qd4=and(Qs4,Qt4)`
Q6_Q_and_QQn⚠Experimental
  `Qd4=and(Qs4,!Qt4)`
Q6_Q_not_Q⚠Experimental
  `Qd4=not(Qs4)`
Q6_Q_or_QQ⚠Experimental
  `Qd4=or(Qs4,Qt4)`
Q6_Q_or_QQn⚠Experimental
  `Qd4=or(Qs4,!Qt4)`
Q6_Q_vand_VR⚠Experimental
  `Qd4=vand(Vu32,Rt32)`
Q6_Q_vandor_QVR⚠Experimental
  `Qx4|=vand(Vu32,Rt32)`
Q6_Q_vcmp_eq_VbVb⚠Experimental
  `Qd4=vcmp.eq(Vu32.b,Vv32.b)`
Q6_Q_vcmp_eq_VhVh⚠Experimental
  `Qd4=vcmp.eq(Vu32.h,Vv32.h)`
Q6_Q_vcmp_eq_VwVw⚠Experimental
  `Qd4=vcmp.eq(Vu32.w,Vv32.w)`
Q6_Q_vcmp_eqand_QVbVb⚠Experimental
  `Qx4&=vcmp.eq(Vu32.b,Vv32.b)`
Q6_Q_vcmp_eqand_QVhVh⚠Experimental
  `Qx4&=vcmp.eq(Vu32.h,Vv32.h)`
Q6_Q_vcmp_eqand_QVwVw⚠Experimental
  `Qx4&=vcmp.eq(Vu32.w,Vv32.w)`
Q6_Q_vcmp_eqor_QVbVb⚠Experimental
  `Qx4|=vcmp.eq(Vu32.b,Vv32.b)`
Q6_Q_vcmp_eqor_QVhVh⚠Experimental
  `Qx4|=vcmp.eq(Vu32.h,Vv32.h)`
Q6_Q_vcmp_eqor_QVwVw⚠Experimental
  `Qx4|=vcmp.eq(Vu32.w,Vv32.w)`
Q6_Q_vcmp_eqxacc_QVbVb⚠Experimental
  `Qx4^=vcmp.eq(Vu32.b,Vv32.b)`
Q6_Q_vcmp_eqxacc_QVhVh⚠Experimental
  `Qx4^=vcmp.eq(Vu32.h,Vv32.h)`
Q6_Q_vcmp_eqxacc_QVwVw⚠Experimental
  `Qx4^=vcmp.eq(Vu32.w,Vv32.w)`
Q6_Q_vcmp_gt_VbVb⚠Experimental
  `Qd4=vcmp.gt(Vu32.b,Vv32.b)`
Q6_Q_vcmp_gt_VhVh⚠Experimental
  `Qd4=vcmp.gt(Vu32.h,Vv32.h)`
Q6_Q_vcmp_gt_VhfVhf⚠Experimental
  `Qd4=vcmp.gt(Vu32.hf,Vv32.hf)`
Q6_Q_vcmp_gt_VsfVsf⚠Experimental
  `Qd4=vcmp.gt(Vu32.sf,Vv32.sf)`
Q6_Q_vcmp_gt_VubVub⚠Experimental
  `Qd4=vcmp.gt(Vu32.ub,Vv32.ub)`
Q6_Q_vcmp_gt_VuhVuh⚠Experimental
  `Qd4=vcmp.gt(Vu32.uh,Vv32.uh)`
Q6_Q_vcmp_gt_VuwVuw⚠Experimental
  `Qd4=vcmp.gt(Vu32.uw,Vv32.uw)`
Q6_Q_vcmp_gt_VwVw⚠Experimental
  `Qd4=vcmp.gt(Vu32.w,Vv32.w)`
Q6_Q_vcmp_gtand_QVbVb⚠Experimental
  `Qx4&=vcmp.gt(Vu32.b,Vv32.b)`
Q6_Q_vcmp_gtand_QVhVh⚠Experimental
  `Qx4&=vcmp.gt(Vu32.h,Vv32.h)`
Q6_Q_vcmp_gtand_QVhfVhf⚠Experimental
  `Qx4&=vcmp.gt(Vu32.hf,Vv32.hf)`
Q6_Q_vcmp_gtand_QVsfVsf⚠Experimental
  `Qx4&=vcmp.gt(Vu32.sf,Vv32.sf)`
Q6_Q_vcmp_gtand_QVubVub⚠Experimental
  `Qx4&=vcmp.gt(Vu32.ub,Vv32.ub)`
Q6_Q_vcmp_gtand_QVuhVuh⚠Experimental
  `Qx4&=vcmp.gt(Vu32.uh,Vv32.uh)`
Q6_Q_vcmp_gtand_QVuwVuw⚠Experimental
  `Qx4&=vcmp.gt(Vu32.uw,Vv32.uw)`
Q6_Q_vcmp_gtand_QVwVw⚠Experimental
  `Qx4&=vcmp.gt(Vu32.w,Vv32.w)`
Q6_Q_vcmp_gtor_QVbVb⚠Experimental
  `Qx4|=vcmp.gt(Vu32.b,Vv32.b)`
Q6_Q_vcmp_gtor_QVhVh⚠Experimental
  `Qx4|=vcmp.gt(Vu32.h,Vv32.h)`
Q6_Q_vcmp_gtor_QVhfVhf⚠Experimental
  `Qx4|=vcmp.gt(Vu32.hf,Vv32.hf)`
Q6_Q_vcmp_gtor_QVsfVsf⚠Experimental
  `Qx4|=vcmp.gt(Vu32.sf,Vv32.sf)`
Q6_Q_vcmp_gtor_QVubVub⚠Experimental
  `Qx4|=vcmp.gt(Vu32.ub,Vv32.ub)`
Q6_Q_vcmp_gtor_QVuhVuh⚠Experimental
  `Qx4|=vcmp.gt(Vu32.uh,Vv32.uh)`
Q6_Q_vcmp_gtor_QVuwVuw⚠Experimental
  `Qx4|=vcmp.gt(Vu32.uw,Vv32.uw)`
Q6_Q_vcmp_gtor_QVwVw⚠Experimental
  `Qx4|=vcmp.gt(Vu32.w,Vv32.w)`
Q6_Q_vcmp_gtxacc_QVbVb⚠Experimental
  `Qx4^=vcmp.gt(Vu32.b,Vv32.b)`
Q6_Q_vcmp_gtxacc_QVhVh⚠Experimental
  `Qx4^=vcmp.gt(Vu32.h,Vv32.h)`
Q6_Q_vcmp_gtxacc_QVhfVhf⚠Experimental
  `Qx4^=vcmp.gt(Vu32.hf,Vv32.hf)`
Q6_Q_vcmp_gtxacc_QVsfVsf⚠Experimental
  `Qx4^=vcmp.gt(Vu32.sf,Vv32.sf)`
Q6_Q_vcmp_gtxacc_QVubVub⚠Experimental
  `Qx4^=vcmp.gt(Vu32.ub,Vv32.ub)`
Q6_Q_vcmp_gtxacc_QVuhVuh⚠Experimental
  `Qx4^=vcmp.gt(Vu32.uh,Vv32.uh)`
Q6_Q_vcmp_gtxacc_QVuwVuw⚠Experimental
  `Qx4^=vcmp.gt(Vu32.uw,Vv32.uw)`
Q6_Q_vcmp_gtxacc_QVwVw⚠Experimental
  `Qx4^=vcmp.gt(Vu32.w,Vv32.w)`
Q6_Q_vsetq2_R⚠Experimental
  `Qd4=vsetq2(Rt32)`
Q6_Q_vsetq_R⚠Experimental
  `Qd4=vsetq(Rt32)`
Q6_Q_xor_QQ⚠Experimental
  `Qd4=xor(Qs4,Qt4)`
Q6_Qb_vshuffe_QhQh⚠Experimental
  `Qd4.b=vshuffe(Qs4.h,Qt4.h)`
Q6_Qh_vshuffe_QwQw⚠Experimental
  `Qd4.h=vshuffe(Qs4.w,Qt4.w)`
Q6_R_vextract_VR⚠Experimental
  `Rd32=vextract(Vu32,Rs32)`
Q6_V_equals_V⚠Experimental
  `Vd32=Vu32`
Q6_V_hi_W⚠Experimental
  `Vd32=hi(Vss32)`
Q6_V_lo_W⚠Experimental
  `Vd32=lo(Vss32)`
Q6_V_vabs_V⚠Experimental
  `Vd32.f8=vabs(Vu32.f8)`
Q6_V_valign_VVI⚠Experimental
  `Vd32=valign(Vu32,Vv32,#u3)`
Q6_V_valign_VVR⚠Experimental
  `Vd32=valign(Vu32,Vv32,Rt8)`
Q6_V_vand_QR⚠Experimental
  `Vd32=vand(Qu4,Rt32)`
Q6_V_vand_QV⚠Experimental
  `Vd32=vand(Qv4,Vu32)`
Q6_V_vand_QnR⚠Experimental
  `Vd32=vand(!Qu4,Rt32)`
Q6_V_vand_QnV⚠Experimental
  `Vd32=vand(!Qv4,Vu32)`
Q6_V_vand_VV⚠Experimental
  `Vd32=vand(Vu32,Vv32)`
Q6_V_vandor_VQR⚠Experimental
  `Vx32|=vand(Qu4,Rt32)`
Q6_V_vandor_VQnR⚠Experimental
  `Vx32|=vand(!Qu4,Rt32)`
Q6_V_vdelta_VV⚠Experimental
  `Vd32=vdelta(Vu32,Vv32)`
Q6_V_vfmax_VV⚠Experimental
  `Vd32.f8=vfmax(Vu32.f8,Vv32.f8)`
Q6_V_vfmin_VV⚠Experimental
  `Vd32.f8=vfmin(Vu32.f8,Vv32.f8)`
Q6_V_vfneg_V⚠Experimental
  `Vd32.f8=vfneg(Vu32.f8)`
Q6_V_vgetqfext_VR⚠Experimental
  `Vd32=vgetqfext(Vu32.x,Rt32)`
Q6_V_vlalign_VVI⚠Experimental
  `Vd32=vlalign(Vu32,Vv32,#u3)`
Q6_V_vlalign_VVR⚠Experimental
  `Vd32=vlalign(Vu32,Vv32,Rt8)`
Q6_V_vmux_QVV⚠Experimental
  `Vd32=vmux(Qt4,Vu32,Vv32)`
Q6_V_vnot_V⚠Experimental
  `Vd32=vnot(Vu32)`
Q6_V_vor_VV⚠Experimental
  `Vd32=vor(Vu32,Vv32)`
Q6_V_vrdelta_VV⚠Experimental
  `Vd32=vrdelta(Vu32,Vv32)`
Q6_V_vror_VR⚠Experimental
  `Vd32=vror(Vu32,Rt32)`
Q6_V_vsetqfext_VR⚠Experimental
  `Vd32.x=vsetqfext(Vu32,Rt32)`
Q6_V_vsplat_R⚠Experimental
  `Vd32=vsplat(Rt32)`
Q6_V_vxor_VV⚠Experimental
  `Vd32=vxor(Vu32,Vv32)`
Q6_V_vzero⚠Experimental
  `Vd32=#0`
Q6_Vb_condacc_QVbVb⚠Experimental
  `if (Qv4) Vx32.b+=Vu32.b`
Q6_Vb_condacc_QnVbVb⚠Experimental
  `if (!Qv4) Vx32.b+=Vu32.b`
Q6_Vb_condnac_QVbVb⚠Experimental
  `if (Qv4) Vx32.b-=Vu32.b`
Q6_Vb_condnac_QnVbVb⚠Experimental
  `if (!Qv4) Vx32.b-=Vu32.b`
Q6_Vb_prefixsum_Q⚠Experimental
  `Vd32.b=prefixsum(Qv4)`
Q6_Vb_vabs_Vb⚠Experimental
  `Vd32.b=vabs(Vu32.b)`
Q6_Vb_vabs_Vb_sat⚠Experimental
  `Vd32.b=vabs(Vu32.b):sat`
Q6_Vb_vadd_VbVb⚠Experimental
  `Vd32.b=vadd(Vu32.b,Vv32.b)`
Q6_Vb_vadd_VbVb_sat⚠Experimental
  `Vd32.b=vadd(Vu32.b,Vv32.b):sat`
Q6_Vb_vasr_VhVhR_rnd_sat⚠Experimental
  `Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat`
Q6_Vb_vasr_VhVhR_sat⚠Experimental
  `Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):sat`
Q6_Vb_vavg_VbVb⚠Experimental
  `Vd32.b=vavg(Vu32.b,Vv32.b)`
Q6_Vb_vavg_VbVb_rnd⚠Experimental
  `Vd32.b=vavg(Vu32.b,Vv32.b):rnd`
Q6_Vb_vcvt_VhfVhf⚠Experimental
  `Vd32.b=vcvt(Vu32.hf,Vv32.hf)`
Q6_Vb_vdeal_Vb⚠Experimental
  `Vd32.b=vdeal(Vu32.b)`
Q6_Vb_vdeale_VbVb⚠Experimental
  `Vd32.b=vdeale(Vu32.b,Vv32.b)`
Q6_Vb_vlut32_VbVbI⚠Experimental
  `Vd32.b=vlut32(Vu32.b,Vv32.b,#u3)`
Q6_Vb_vlut32_VbVbR⚠Experimental
  `Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8)`
Q6_Vb_vlut32_VbVbR_nomatch⚠Experimental
  `Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8):nomatch`
Q6_Vb_vlut32or_VbVbVbI⚠Experimental
  `Vx32.b|=vlut32(Vu32.b,Vv32.b,#u3)`
Q6_Vb_vlut32or_VbVbVbR⚠Experimental
  `Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8)`
Q6_Vb_vmax_VbVb⚠Experimental
  `Vd32.b=vmax(Vu32.b,Vv32.b)`
Q6_Vb_vmin_VbVb⚠Experimental
  `Vd32.b=vmin(Vu32.b,Vv32.b)`
Q6_Vb_vnavg_VbVb⚠Experimental
  `Vd32.b=vnavg(Vu32.b,Vv32.b)`
Q6_Vb_vnavg_VubVub⚠Experimental
  `Vd32.b=vnavg(Vu32.ub,Vv32.ub)`
Q6_Vb_vpack_VhVh_sat⚠Experimental
  `Vd32.b=vpack(Vu32.h,Vv32.h):sat`
Q6_Vb_vpacke_VhVh⚠Experimental
  `Vd32.b=vpacke(Vu32.h,Vv32.h)`
Q6_Vb_vpacko_VhVh⚠Experimental
  `Vd32.b=vpacko(Vu32.h,Vv32.h)`
Q6_Vb_vround_VhVh_sat⚠Experimental
  `Vd32.b=vround(Vu32.h,Vv32.h):sat`
Q6_Vb_vshuff_Vb⚠Experimental
  `Vd32.b=vshuff(Vu32.b)`
Q6_Vb_vshuffe_VbVb⚠Experimental
  `Vd32.b=vshuffe(Vu32.b,Vv32.b)`
Q6_Vb_vshuffo_VbVb⚠Experimental
  `Vd32.b=vshuffo(Vu32.b,Vv32.b)`
Q6_Vb_vsplat_R⚠Experimental
  `Vd32.b=vsplat(Rt32)`
Q6_Vb_vsub_VbVb⚠Experimental
  `Vd32.b=vsub(Vu32.b,Vv32.b)`
Q6_Vb_vsub_VbVb_sat⚠Experimental
  `Vd32.b=vsub(Vu32.b,Vv32.b):sat`
Q6_Vh_condacc_QVhVh⚠Experimental
  `if (Qv4) Vx32.h+=Vu32.h`
Q6_Vh_condacc_QnVhVh⚠Experimental
  `if (!Qv4) Vx32.h+=Vu32.h`
Q6_Vh_condnac_QVhVh⚠Experimental
  `if (Qv4) Vx32.h-=Vu32.h`
Q6_Vh_condnac_QnVhVh⚠Experimental
  `if (!Qv4) Vx32.h-=Vu32.h`
Q6_Vh_equals_Vhf⚠Experimental
  `Vd32.h=Vu32.hf`
Q6_Vh_prefixsum_Q⚠Experimental
  `Vd32.h=prefixsum(Qv4)`
Q6_Vh_vabs_Vh⚠Experimental
  `Vd32.h=vabs(Vu32.h)`
Q6_Vh_vabs_Vh_sat⚠Experimental
  `Vd32.h=vabs(Vu32.h):sat`
Q6_Vh_vadd_VhVh⚠Experimental
  `Vd32.h=vadd(Vu32.h,Vv32.h)`
Q6_Vh_vadd_VhVh_sat⚠Experimental
  `Vd32.h=vadd(Vu32.h,Vv32.h):sat`
Q6_Vh_vadd_vclb_VhVh⚠Experimental
  `Vd32.h=vadd(vclb(Vu32.h),Vv32.h)`
Q6_Vh_vasl_VhR⚠Experimental
  `Vd32.h=vasl(Vu32.h,Rt32)`
Q6_Vh_vasl_VhVh⚠Experimental
  `Vd32.h=vasl(Vu32.h,Vv32.h)`
Q6_Vh_vaslacc_VhVhR⚠Experimental
  `Vx32.h+=vasl(Vu32.h,Rt32)`
Q6_Vh_vasr_VhR⚠Experimental
  `Vd32.h=vasr(Vu32.h,Rt32)`
Q6_Vh_vasr_VhVh⚠Experimental
  `Vd32.h=vasr(Vu32.h,Vv32.h)`
Q6_Vh_vasr_VwVwR⚠Experimental
  `Vd32.h=vasr(Vu32.w,Vv32.w,Rt8)`
Q6_Vh_vasr_VwVwR_rnd_sat⚠Experimental
  `Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat`
Q6_Vh_vasr_VwVwR_sat⚠Experimental
  `Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat`
Q6_Vh_vasracc_VhVhR⚠Experimental
  `Vx32.h+=vasr(Vu32.h,Rt32)`
Q6_Vh_vavg_VhVh⚠Experimental
  `Vd32.h=vavg(Vu32.h,Vv32.h)`
Q6_Vh_vavg_VhVh_rnd⚠Experimental
  `Vd32.h=vavg(Vu32.h,Vv32.h):rnd`
Q6_Vh_vcvt_Vhf⚠Experimental
  `Vd32.h=vcvt(Vu32.hf)`
Q6_Vh_vdeal_Vh⚠Experimental
  `Vd32.h=vdeal(Vu32.h)`
Q6_Vh_vdmpy_VubRb⚠Experimental
  `Vd32.h=vdmpy(Vu32.ub,Rt32.b)`
Q6_Vh_vdmpyacc_VhVubRb⚠Experimental
  `Vx32.h+=vdmpy(Vu32.ub,Rt32.b)`
Q6_Vh_vlsr_VhVh⚠Experimental
  `Vd32.h=vlsr(Vu32.h,Vv32.h)`
Q6_Vh_vmax_VhVh⚠Experimental
  `Vd32.h=vmax(Vu32.h,Vv32.h)`
Q6_Vh_vmin_VhVh⚠Experimental
  `Vd32.h=vmin(Vu32.h,Vv32.h)`
Q6_Vh_vmpy_VhRh_s1_rnd_sat⚠Experimental
  `Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat`
Q6_Vh_vmpy_VhRh_s1_sat⚠Experimental
  `Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat`
Q6_Vh_vmpy_VhVh_s1_rnd_sat⚠Experimental
  `Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat`
Q6_Vh_vmpyi_VhRb⚠Experimental
  `Vd32.h=vmpyi(Vu32.h,Rt32.b)`
Q6_Vh_vmpyi_VhVh⚠Experimental
  `Vd32.h=vmpyi(Vu32.h,Vv32.h)`
Q6_Vh_vmpyiacc_VhVhRb⚠Experimental
  `Vx32.h+=vmpyi(Vu32.h,Rt32.b)`
Q6_Vh_vmpyiacc_VhVhVh⚠Experimental
  `Vx32.h+=vmpyi(Vu32.h,Vv32.h)`
Q6_Vh_vnavg_VhVh⚠Experimental
  `Vd32.h=vnavg(Vu32.h,Vv32.h)`
Q6_Vh_vnormamt_Vh⚠Experimental
  `Vd32.h=vnormamt(Vu32.h)`
Q6_Vh_vpack_VwVw_sat⚠Experimental
  `Vd32.h=vpack(Vu32.w,Vv32.w):sat`
Q6_Vh_vpacke_VwVw⚠Experimental
  `Vd32.h=vpacke(Vu32.w,Vv32.w)`
Q6_Vh_vpacko_VwVw⚠Experimental
  `Vd32.h=vpacko(Vu32.w,Vv32.w)`
Q6_Vh_vpopcount_Vh⚠Experimental
  `Vd32.h=vpopcount(Vu32.h)`
Q6_Vh_vround_VwVw_sat⚠Experimental
  `Vd32.h=vround(Vu32.w,Vv32.w):sat`
Q6_Vh_vsat_VwVw⚠Experimental
  `Vd32.h=vsat(Vu32.w,Vv32.w)`
Q6_Vh_vshuff_Vh⚠Experimental
  `Vd32.h=vshuff(Vu32.h)`
Q6_Vh_vshuffe_VhVh⚠Experimental
  `Vd32.h=vshuffe(Vu32.h,Vv32.h)`
Q6_Vh_vshuffo_VhVh⚠Experimental
  `Vd32.h=vshuffo(Vu32.h,Vv32.h)`
Q6_Vh_vsplat_R⚠Experimental
  `Vd32.h=vsplat(Rt32)`
Q6_Vh_vsub_VhVh⚠Experimental
  `Vd32.h=vsub(Vu32.h,Vv32.h)`
Q6_Vh_vsub_VhVh_sat⚠Experimental
  `Vd32.h=vsub(Vu32.h,Vv32.h):sat`
Q6_Vhf_equals_Vh⚠Experimental
  `Vd32.hf=Vu32.h`
Q6_Vhf_equals_Vqf16⚠Experimental
  `Vd32.hf=Vu32.qf16`
Q6_Vhf_equals_Wqf32⚠Experimental
  `Vd32.hf=Vuu32.qf32`
Q6_Vhf_vabs_Vhf⚠Experimental
  `Vd32.hf=vabs(Vu32.hf)`
Q6_Vhf_vadd_VhfVhf⚠Experimental
  `Vd32.hf=vadd(Vu32.hf,Vv32.hf)`
Q6_Vhf_vcvt_Vh⚠Experimental
  `Vd32.hf=vcvt(Vu32.h)`
Q6_Vhf_vcvt_VsfVsf⚠Experimental
  `Vd32.hf=vcvt(Vu32.sf,Vv32.sf)`
Q6_Vhf_vcvt_Vuh⚠Experimental
  `Vd32.hf=vcvt(Vu32.uh)`
Q6_Vhf_vfmax_VhfVhf⚠Experimental
  `Vd32.hf=vfmax(Vu32.hf,Vv32.hf)`
Q6_Vhf_vfmin_VhfVhf⚠Experimental
  `Vd32.hf=vfmin(Vu32.hf,Vv32.hf)`
Q6_Vhf_vfneg_Vhf⚠Experimental
  `Vd32.hf=vfneg(Vu32.hf)`
Q6_Vhf_vmax_VhfVhf⚠Experimental
  `Vd32.hf=vmax(Vu32.hf,Vv32.hf)`
Q6_Vhf_vmin_VhfVhf⚠Experimental
  `Vd32.hf=vmin(Vu32.hf,Vv32.hf)`
Q6_Vhf_vmpy_VhfVhf⚠Experimental
  `Vd32.hf=vmpy(Vu32.hf,Vv32.hf)`
Q6_Vhf_vmpyacc_VhfVhfVhf⚠Experimental
  `Vx32.hf+=vmpy(Vu32.hf,Vv32.hf)`
Q6_Vhf_vsub_VhfVhf⚠Experimental
  `Vd32.hf=vsub(Vu32.hf,Vv32.hf)`
Q6_Vqf16_vadd_VhfVhf⚠Experimental
  `Vd32.qf16=vadd(Vu32.hf,Vv32.hf)`
Q6_Vqf16_vadd_Vqf16Vhf⚠Experimental
  `Vd32.qf16=vadd(Vu32.qf16,Vv32.hf)`
Q6_Vqf16_vadd_Vqf16Vqf16⚠Experimental
  `Vd32.qf16=vadd(Vu32.qf16,Vv32.qf16)`
Q6_Vqf16_vmpy_VhfVhf⚠Experimental
  `Vd32.qf16=vmpy(Vu32.hf,Vv32.hf)`
Q6_Vqf16_vmpy_Vqf16Vhf⚠Experimental
  `Vd32.qf16=vmpy(Vu32.qf16,Vv32.hf)`
Q6_Vqf16_vmpy_Vqf16Vqf16⚠Experimental
  `Vd32.qf16=vmpy(Vu32.qf16,Vv32.qf16)`
Q6_Vqf16_vsub_VhfVhf⚠Experimental
  `Vd32.qf16=vsub(Vu32.hf,Vv32.hf)`
Q6_Vqf16_vsub_Vqf16Vhf⚠Experimental
  `Vd32.qf16=vsub(Vu32.qf16,Vv32.hf)`
Q6_Vqf16_vsub_Vqf16Vqf16⚠Experimental
  `Vd32.qf16=vsub(Vu32.qf16,Vv32.qf16)`
Q6_Vqf32_vadd_Vqf32Vqf32⚠Experimental
  `Vd32.qf32=vadd(Vu32.qf32,Vv32.qf32)`
Q6_Vqf32_vadd_Vqf32Vsf⚠Experimental
  `Vd32.qf32=vadd(Vu32.qf32,Vv32.sf)`
Q6_Vqf32_vadd_VsfVsf⚠Experimental
  `Vd32.qf32=vadd(Vu32.sf,Vv32.sf)`
Q6_Vqf32_vmpy_Vqf32Vqf32⚠Experimental
  `Vd32.qf32=vmpy(Vu32.qf32,Vv32.qf32)`
Q6_Vqf32_vmpy_VsfVsf⚠Experimental
  `Vd32.qf32=vmpy(Vu32.sf,Vv32.sf)`
Q6_Vqf32_vsub_Vqf32Vqf32⚠Experimental
  `Vd32.qf32=vsub(Vu32.qf32,Vv32.qf32)`
Q6_Vqf32_vsub_Vqf32Vsf⚠Experimental
  `Vd32.qf32=vsub(Vu32.qf32,Vv32.sf)`
Q6_Vqf32_vsub_VsfVsf⚠Experimental
  `Vd32.qf32=vsub(Vu32.sf,Vv32.sf)`
Q6_Vsf_equals_Vqf32⚠Experimental
  `Vd32.sf=Vu32.qf32`
Q6_Vsf_equals_Vw⚠Experimental
  `Vd32.sf=Vu32.w`
Q6_Vsf_vabs_Vsf⚠Experimental
  `Vd32.sf=vabs(Vu32.sf)`
Q6_Vsf_vadd_VsfVsf⚠Experimental
  `Vd32.sf=vadd(Vu32.sf,Vv32.sf)`
Q6_Vsf_vdmpy_VhfVhf⚠Experimental
  `Vd32.sf=vdmpy(Vu32.hf,Vv32.hf)`
Q6_Vsf_vdmpyacc_VsfVhfVhf⚠Experimental
  `Vx32.sf+=vdmpy(Vu32.hf,Vv32.hf)`
Q6_Vsf_vfmax_VsfVsf⚠Experimental
  `Vd32.sf=vfmax(Vu32.sf,Vv32.sf)`
Q6_Vsf_vfmin_VsfVsf⚠Experimental
  `Vd32.sf=vfmin(Vu32.sf,Vv32.sf)`
Q6_Vsf_vfneg_Vsf⚠Experimental
  `Vd32.sf=vfneg(Vu32.sf)`
Q6_Vsf_vmax_VsfVsf⚠Experimental
  `Vd32.sf=vmax(Vu32.sf,Vv32.sf)`
Q6_Vsf_vmin_VsfVsf⚠Experimental
  `Vd32.sf=vmin(Vu32.sf,Vv32.sf)`
Q6_Vsf_vmpy_VsfVsf⚠Experimental
  `Vd32.sf=vmpy(Vu32.sf,Vv32.sf)`
Q6_Vsf_vsub_VsfVsf⚠Experimental
  `Vd32.sf=vsub(Vu32.sf,Vv32.sf)`
Q6_Vub_vabsdiff_VubVub⚠Experimental
  `Vd32.ub=vabsdiff(Vu32.ub,Vv32.ub)`
Q6_Vub_vadd_VubVb_sat⚠Experimental
  `Vd32.ub=vadd(Vu32.ub,Vv32.b):sat`
Q6_Vub_vadd_VubVub_sat⚠Experimental
  `Vd32.ub=vadd(Vu32.ub,Vv32.ub):sat`
Q6_Vub_vasr_VhVhR_rnd_sat⚠Experimental
  `Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat`
Q6_Vub_vasr_VhVhR_sat⚠Experimental
  `Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):sat`
Q6_Vub_vasr_VuhVuhR_rnd_sat⚠Experimental
  `Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):rnd:sat`
Q6_Vub_vasr_VuhVuhR_sat⚠Experimental
  `Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):sat`
Q6_Vub_vasr_WuhVub_rnd_sat⚠Experimental
  `Vd32.ub=vasr(Vuu32.uh,Vv32.ub):rnd:sat`
Q6_Vub_vasr_WuhVub_sat⚠Experimental
  `Vd32.ub=vasr(Vuu32.uh,Vv32.ub):sat`
Q6_Vub_vavg_VubVub⚠Experimental
  `Vd32.ub=vavg(Vu32.ub,Vv32.ub)`
Q6_Vub_vavg_VubVub_rnd⚠Experimental
  `Vd32.ub=vavg(Vu32.ub,Vv32.ub):rnd`
Q6_Vub_vcvt_VhfVhf⚠Experimental
  `Vd32.ub=vcvt(Vu32.hf,Vv32.hf)`
Q6_Vub_vlsr_VubR⚠Experimental
  `Vd32.ub=vlsr(Vu32.ub,Rt32)`
Q6_Vub_vmax_VubVub⚠Experimental
  `Vd32.ub=vmax(Vu32.ub,Vv32.ub)`
Q6_Vub_vmin_VubVub⚠Experimental
  `Vd32.ub=vmin(Vu32.ub,Vv32.ub)`
Q6_Vub_vpack_VhVh_sat⚠Experimental
  `Vd32.ub=vpack(Vu32.h,Vv32.h):sat`
Q6_Vub_vround_VhVh_sat⚠Experimental
  `Vd32.ub=vround(Vu32.h,Vv32.h):sat`
Q6_Vub_vround_VuhVuh_sat⚠Experimental
  `Vd32.ub=vround(Vu32.uh,Vv32.uh):sat`
Q6_Vub_vsat_VhVh⚠Experimental
  `Vd32.ub=vsat(Vu32.h,Vv32.h)`
Q6_Vub_vsub_VubVb_sat⚠Experimental
  `Vd32.ub=vsub(Vu32.ub,Vv32.b):sat`
Q6_Vub_vsub_VubVub_sat⚠Experimental
  `Vd32.ub=vsub(Vu32.ub,Vv32.ub):sat`
Q6_Vuh_vabsdiff_VhVh⚠Experimental
  `Vd32.uh=vabsdiff(Vu32.h,Vv32.h)`
Q6_Vuh_vabsdiff_VuhVuh⚠Experimental
  `Vd32.uh=vabsdiff(Vu32.uh,Vv32.uh)`
Q6_Vuh_vadd_VuhVuh_sat⚠Experimental
  `Vd32.uh=vadd(Vu32.uh,Vv32.uh):sat`
Q6_Vuh_vasr_VuwVuwR_rnd_sat⚠Experimental
  `Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):rnd:sat`
Q6_Vuh_vasr_VuwVuwR_sat⚠Experimental
  `Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):sat`
Q6_Vuh_vasr_VwVwR_rnd_sat⚠Experimental
  `Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat`
Q6_Vuh_vasr_VwVwR_sat⚠Experimental
  `Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat`
Q6_Vuh_vasr_WwVuh_rnd_sat⚠Experimental
  `Vd32.uh=vasr(Vuu32.w,Vv32.uh):rnd:sat`
Q6_Vuh_vasr_WwVuh_sat⚠Experimental
  `Vd32.uh=vasr(Vuu32.w,Vv32.uh):sat`
Q6_Vuh_vavg_VuhVuh⚠Experimental
  `Vd32.uh=vavg(Vu32.uh,Vv32.uh)`
Q6_Vuh_vavg_VuhVuh_rnd⚠Experimental
  `Vd32.uh=vavg(Vu32.uh,Vv32.uh):rnd`
Q6_Vuh_vcl0_Vuh⚠Experimental
  `Vd32.uh=vcl0(Vu32.uh)`
Q6_Vuh_vcvt_Vhf⚠Experimental
  `Vd32.uh=vcvt(Vu32.hf)`
Q6_Vuh_vlsr_VuhR⚠Experimental
  `Vd32.uh=vlsr(Vu32.uh,Rt32)`
Q6_Vuh_vmax_VuhVuh⚠Experimental
  `Vd32.uh=vmax(Vu32.uh,Vv32.uh)`
Q6_Vuh_vmin_VuhVuh⚠Experimental
  `Vd32.uh=vmin(Vu32.uh,Vv32.uh)`
Q6_Vuh_vmpy_VuhVuh_rs16⚠Experimental
  `Vd32.uh=vmpy(Vu32.uh,Vv32.uh):>>16`
Q6_Vuh_vpack_VwVw_sat⚠Experimental
  `Vd32.uh=vpack(Vu32.w,Vv32.w):sat`
Q6_Vuh_vround_VuwVuw_sat⚠Experimental
  `Vd32.uh=vround(Vu32.uw,Vv32.uw):sat`
Q6_Vuh_vround_VwVw_sat⚠Experimental
  `Vd32.uh=vround(Vu32.w,Vv32.w):sat`
Q6_Vuh_vsat_VuwVuw⚠Experimental
  `Vd32.uh=vsat(Vu32.uw,Vv32.uw)`
Q6_Vuh_vsub_VuhVuh_sat⚠Experimental
  `Vd32.uh=vsub(Vu32.uh,Vv32.uh):sat`
Q6_Vuw_vabsdiff_VwVw⚠Experimental
  `Vd32.uw=vabsdiff(Vu32.w,Vv32.w)`
Q6_Vuw_vadd_VuwVuw_sat⚠Experimental
  `Vd32.uw=vadd(Vu32.uw,Vv32.uw):sat`
Q6_Vuw_vavg_VuwVuw⚠Experimental
  `Vd32.uw=vavg(Vu32.uw,Vv32.uw)`
Q6_Vuw_vavg_VuwVuw_rnd⚠Experimental
  `Vd32.uw=vavg(Vu32.uw,Vv32.uw):rnd`
Q6_Vuw_vcl0_Vuw⚠Experimental
  `Vd32.uw=vcl0(Vu32.uw)`
Q6_Vuw_vlsr_VuwR⚠Experimental
  `Vd32.uw=vlsr(Vu32.uw,Rt32)`
Q6_Vuw_vmpye_VuhRuh⚠Experimental
  `Vd32.uw=vmpye(Vu32.uh,Rt32.uh)`
Q6_Vuw_vmpyeacc_VuwVuhRuh⚠Experimental
  `Vx32.uw+=vmpye(Vu32.uh,Rt32.uh)`
Q6_Vuw_vrmpy_VubRub⚠Experimental
  `Vd32.uw=vrmpy(Vu32.ub,Rt32.ub)`
Q6_Vuw_vrmpy_VubVub⚠Experimental
  `Vd32.uw=vrmpy(Vu32.ub,Vv32.ub)`
Q6_Vuw_vrmpyacc_VuwVubRub⚠Experimental
  `Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub)`
Q6_Vuw_vrmpyacc_VuwVubVub⚠Experimental
  `Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub)`
Q6_Vuw_vrotr_VuwVuw⚠Experimental
  `Vd32.uw=vrotr(Vu32.uw,Vv32.uw)`
Q6_Vuw_vsub_VuwVuw_sat⚠Experimental
  `Vd32.uw=vsub(Vu32.uw,Vv32.uw):sat`
Q6_Vw_condacc_QVwVw⚠Experimental
  `if (Qv4) Vx32.w+=Vu32.w`
Q6_Vw_condacc_QnVwVw⚠Experimental
  `if (!Qv4) Vx32.w+=Vu32.w`
Q6_Vw_condnac_QVwVw⚠Experimental
  `if (Qv4) Vx32.w-=Vu32.w`
Q6_Vw_condnac_QnVwVw⚠Experimental
  `if (!Qv4) Vx32.w-=Vu32.w`
Q6_Vw_equals_Vsf⚠Experimental
  `Vd32.w=Vu32.sf`
Q6_Vw_prefixsum_Q⚠Experimental
  `Vd32.w=prefixsum(Qv4)`
Q6_Vw_vabs_Vw⚠Experimental
  `Vd32.w=vabs(Vu32.w)`
Q6_Vw_vabs_Vw_sat⚠Experimental
  `Vd32.w=vabs(Vu32.w):sat`
Q6_Vw_vadd_VwVw⚠Experimental
  `Vd32.w=vadd(Vu32.w,Vv32.w)`
Q6_Vw_vadd_VwVwQ_carry_sat⚠Experimental
  `Vd32.w=vadd(Vu32.w,Vv32.w,Qs4):carry:sat`
Q6_Vw_vadd_VwVw_sat⚠Experimental
  `Vd32.w=vadd(Vu32.w,Vv32.w):sat`
Q6_Vw_vadd_vclb_VwVw⚠Experimental
  `Vd32.w=vadd(vclb(Vu32.w),Vv32.w)`
Q6_Vw_vasl_VwR⚠Experimental
  `Vd32.w=vasl(Vu32.w,Rt32)`
Q6_Vw_vasl_VwVw⚠Experimental
  `Vd32.w=vasl(Vu32.w,Vv32.w)`
Q6_Vw_vaslacc_VwVwR⚠Experimental
  `Vx32.w+=vasl(Vu32.w,Rt32)`
Q6_Vw_vasr_VwR⚠Experimental
  `Vd32.w=vasr(Vu32.w,Rt32)`
Q6_Vw_vasr_VwVw⚠Experimental
  `Vd32.w=vasr(Vu32.w,Vv32.w)`
Q6_Vw_vasracc_VwVwR⚠Experimental
  `Vx32.w+=vasr(Vu32.w,Rt32)`
Q6_Vw_vavg_VwVw⚠Experimental
  `Vd32.w=vavg(Vu32.w,Vv32.w)`
Q6_Vw_vavg_VwVw_rnd⚠Experimental
  `Vd32.w=vavg(Vu32.w,Vv32.w):rnd`
Q6_Vw_vdmpy_VhRb⚠Experimental
  `Vd32.w=vdmpy(Vu32.h,Rt32.b)`
Q6_Vw_vdmpy_VhRh_sat⚠Experimental
  `Vd32.w=vdmpy(Vu32.h,Rt32.h):sat`
Q6_Vw_vdmpy_VhRuh_sat⚠Experimental
  `Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat`
Q6_Vw_vdmpy_VhVh_sat⚠Experimental
  `Vd32.w=vdmpy(Vu32.h,Vv32.h):sat`
Q6_Vw_vdmpy_WhRh_sat⚠Experimental
  `Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat`
Q6_Vw_vdmpy_WhRuh_sat⚠Experimental
  `Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat`
Q6_Vw_vdmpyacc_VwVhRb⚠Experimental
  `Vx32.w+=vdmpy(Vu32.h,Rt32.b)`
Q6_Vw_vdmpyacc_VwVhRh_sat⚠Experimental
  `Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat`
Q6_Vw_vdmpyacc_VwVhRuh_sat⚠Experimental
  `Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat`
Q6_Vw_vdmpyacc_VwVhVh_sat⚠Experimental
  `Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat`
Q6_Vw_vdmpyacc_VwWhRh_sat⚠Experimental
  `Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat`
Q6_Vw_vdmpyacc_VwWhRuh_sat⚠Experimental
  `Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat`
Q6_Vw_vfmv_Vw⚠Experimental
  `Vd32.w=vfmv(Vu32.w)`
Q6_Vw_vinsert_VwR⚠Experimental
  `Vx32.w=vinsert(Rt32)`
Q6_Vw_vlsr_VwVw⚠Experimental
  `Vd32.w=vlsr(Vu32.w,Vv32.w)`
Q6_Vw_vmax_VwVw⚠Experimental
  `Vd32.w=vmax(Vu32.w,Vv32.w)`
Q6_Vw_vmin_VwVw⚠Experimental
  `Vd32.w=vmin(Vu32.w,Vv32.w)`
Q6_Vw_vmpye_VwVuh⚠Experimental
  `Vd32.w=vmpye(Vu32.w,Vv32.uh)`
Q6_Vw_vmpyi_VwRb⚠Experimental
  `Vd32.w=vmpyi(Vu32.w,Rt32.b)`
Q6_Vw_vmpyi_VwRh⚠Experimental
  `Vd32.w=vmpyi(Vu32.w,Rt32.h)`
Q6_Vw_vmpyi_VwRub⚠Experimental
  `Vd32.w=vmpyi(Vu32.w,Rt32.ub)`
Q6_Vw_vmpyiacc_VwVwRb⚠Experimental
  `Vx32.w+=vmpyi(Vu32.w,Rt32.b)`
Q6_Vw_vmpyiacc_VwVwRh⚠Experimental
  `Vx32.w+=vmpyi(Vu32.w,Rt32.h)`
Q6_Vw_vmpyiacc_VwVwRub⚠Experimental
  `Vx32.w+=vmpyi(Vu32.w,Rt32.ub)`
Q6_Vw_vmpyie_VwVuh⚠Experimental
  `Vd32.w=vmpyie(Vu32.w,Vv32.uh)`
Q6_Vw_vmpyieacc_VwVwVh⚠Experimental
  `Vx32.w+=vmpyie(Vu32.w,Vv32.h)`
Q6_Vw_vmpyieacc_VwVwVuh⚠Experimental
  `Vx32.w+=vmpyie(Vu32.w,Vv32.uh)`
Q6_Vw_vmpyieo_VhVh⚠Experimental
  `Vd32.w=vmpyieo(Vu32.h,Vv32.h)`
Q6_Vw_vmpyio_VwVh⚠Experimental
  `Vd32.w=vmpyio(Vu32.w,Vv32.h)`
Q6_Vw_vmpyo_VwVh_s1_rnd_sat⚠Experimental
  `Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat`
Q6_Vw_vmpyo_VwVh_s1_sat⚠Experimental
  `Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat`
Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift⚠Experimental
  `Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift`
Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift⚠Experimental
  `Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift`
Q6_Vw_vnavg_VwVw⚠Experimental
  `Vd32.w=vnavg(Vu32.w,Vv32.w)`
Q6_Vw_vnormamt_Vw⚠Experimental
  `Vd32.w=vnormamt(Vu32.w)`
Q6_Vw_vrmpy_VbVb⚠Experimental
  `Vd32.w=vrmpy(Vu32.b,Vv32.b)`
Q6_Vw_vrmpy_VubRb⚠Experimental
  `Vd32.w=vrmpy(Vu32.ub,Rt32.b)`
Q6_Vw_vrmpy_VubVb⚠Experimental
  `Vd32.w=vrmpy(Vu32.ub,Vv32.b)`
Q6_Vw_vrmpyacc_VwVbVb⚠Experimental
  `Vx32.w+=vrmpy(Vu32.b,Vv32.b)`
Q6_Vw_vrmpyacc_VwVubRb⚠Experimental
  `Vx32.w+=vrmpy(Vu32.ub,Rt32.b)`
Q6_Vw_vrmpyacc_VwVubVb⚠Experimental
  `Vx32.w+=vrmpy(Vu32.ub,Vv32.b)`
Q6_Vw_vsatdw_VwVw⚠Experimental
  `Vd32.w=vsatdw(Vu32.w,Vv32.w)`
Q6_Vw_vsub_VwVw⚠Experimental
  `Vd32.w=vsub(Vu32.w,Vv32.w)`
Q6_Vw_vsub_VwVw_sat⚠Experimental
  `Vd32.w=vsub(Vu32.w,Vv32.w):sat`
Q6_W_equals_W⚠Experimental
  `Vdd32=Vuu32`
Q6_W_vcombine_VV⚠Experimental
  `Vdd32=vcombine(Vu32,Vv32)`
Q6_W_vdeal_VVR⚠Experimental
  `Vdd32=vdeal(Vu32,Vv32,Rt8)`
Q6_W_vmpye_VwVuh⚠Experimental
  `Vdd32=vmpye(Vu32.w,Vv32.uh)`
Q6_W_vmpyoacc_WVwVh⚠Experimental
  `Vxx32+=vmpyo(Vu32.w,Vv32.h)`
Q6_W_vshuff_VVR⚠Experimental
  `Vdd32=vshuff(Vu32,Vv32,Rt8)`
Q6_W_vswap_QVV⚠Experimental
  `Vdd32=vswap(Qt4,Vu32,Vv32)`
Q6_W_vzero⚠Experimental
  `Vdd32=#0`
Q6_Wb_vadd_WbWb⚠Experimental
  `Vdd32.b=vadd(Vuu32.b,Vvv32.b)`
Q6_Wb_vadd_WbWb_sat⚠Experimental
  `Vdd32.b=vadd(Vuu32.b,Vvv32.b):sat`
Q6_Wb_vshuffoe_VbVb⚠Experimental
  `Vdd32.b=vshuffoe(Vu32.b,Vv32.b)`
Q6_Wb_vsub_WbWb⚠Experimental
  `Vdd32.b=vsub(Vuu32.b,Vvv32.b)`
Q6_Wb_vsub_WbWb_sat⚠Experimental
  `Vdd32.b=vsub(Vuu32.b,Vvv32.b):sat`
Q6_Wh_vadd_VubVub⚠Experimental
  `Vdd32.h=vadd(Vu32.ub,Vv32.ub)`
Q6_Wh_vadd_WhWh⚠Experimental
  `Vdd32.h=vadd(Vuu32.h,Vvv32.h)`
Q6_Wh_vadd_WhWh_sat⚠Experimental
  `Vdd32.h=vadd(Vuu32.h,Vvv32.h):sat`
Q6_Wh_vaddacc_WhVubVub⚠Experimental
  `Vxx32.h+=vadd(Vu32.ub,Vv32.ub)`
Q6_Wh_vdmpy_WubRb⚠Experimental
  `Vdd32.h=vdmpy(Vuu32.ub,Rt32.b)`
Q6_Wh_vdmpyacc_WhWubRb⚠Experimental
  `Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b)`
Q6_Wh_vlut16_VbVhI⚠Experimental
  `Vdd32.h=vlut16(Vu32.b,Vv32.h,#u3)`
Q6_Wh_vlut16_VbVhR⚠Experimental
  `Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8)`
Q6_Wh_vlut16_VbVhR_nomatch⚠Experimental
  `Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8):nomatch`
Q6_Wh_vlut16or_WhVbVhI⚠Experimental
  `Vxx32.h|=vlut16(Vu32.b,Vv32.h,#u3)`
Q6_Wh_vlut16or_WhVbVhR⚠Experimental
  `Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8)`
Q6_Wh_vmpa_WubRb⚠Experimental
  `Vdd32.h=vmpa(Vuu32.ub,Rt32.b)`
Q6_Wh_vmpa_WubRub⚠Experimental
  `Vdd32.h=vmpa(Vuu32.ub,Rt32.ub)`
Q6_Wh_vmpa_WubWb⚠Experimental
  `Vdd32.h=vmpa(Vuu32.ub,Vvv32.b)`
Q6_Wh_vmpa_WubWub⚠Experimental
  `Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub)`
Q6_Wh_vmpaacc_WhWubRb⚠Experimental
  `Vxx32.h+=vmpa(Vuu32.ub,Rt32.b)`
Q6_Wh_vmpaacc_WhWubRub⚠Experimental
  `Vxx32.h+=vmpa(Vuu32.ub,Rt32.ub)`
Q6_Wh_vmpy_VbVb⚠Experimental
  `Vdd32.h=vmpy(Vu32.b,Vv32.b)`
Q6_Wh_vmpy_VubRb⚠Experimental
  `Vdd32.h=vmpy(Vu32.ub,Rt32.b)`
Q6_Wh_vmpy_VubVb⚠Experimental
  `Vdd32.h=vmpy(Vu32.ub,Vv32.b)`
Q6_Wh_vmpyacc_WhVbVb⚠Experimental
  `Vxx32.h+=vmpy(Vu32.b,Vv32.b)`
Q6_Wh_vmpyacc_WhVubRb⚠Experimental
  `Vxx32.h+=vmpy(Vu32.ub,Rt32.b)`
Q6_Wh_vmpyacc_WhVubVb⚠Experimental
  `Vxx32.h+=vmpy(Vu32.ub,Vv32.b)`
Q6_Wh_vshuffoe_VhVh⚠Experimental
  `Vdd32.h=vshuffoe(Vu32.h,Vv32.h)`
Q6_Wh_vsub_VubVub⚠Experimental
  `Vdd32.h=vsub(Vu32.ub,Vv32.ub)`
Q6_Wh_vsub_WhWh⚠Experimental
  `Vdd32.h=vsub(Vuu32.h,Vvv32.h)`
Q6_Wh_vsub_WhWh_sat⚠Experimental
  `Vdd32.h=vsub(Vuu32.h,Vvv32.h):sat`
Q6_Wh_vsxt_Vb⚠Experimental
  `Vdd32.h=vsxt(Vu32.b)`
Q6_Wh_vtmpy_WbRb⚠Experimental
  `Vdd32.h=vtmpy(Vuu32.b,Rt32.b)`
Q6_Wh_vtmpy_WubRb⚠Experimental
  `Vdd32.h=vtmpy(Vuu32.ub,Rt32.b)`
Q6_Wh_vtmpyacc_WhWbRb⚠Experimental
  `Vxx32.h+=vtmpy(Vuu32.b,Rt32.b)`
Q6_Wh_vtmpyacc_WhWubRb⚠Experimental
  `Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b)`
Q6_Wh_vunpack_Vb⚠Experimental
  `Vdd32.h=vunpack(Vu32.b)`
Q6_Wh_vunpackoor_WhVb⚠Experimental
  `Vxx32.h|=vunpacko(Vu32.b)`
Q6_Whf_vcvt2_Vb⚠Experimental
  `Vdd32.hf=vcvt2(Vu32.b)`
Q6_Whf_vcvt2_Vub⚠Experimental
  `Vdd32.hf=vcvt2(Vu32.ub)`
Q6_Whf_vcvt_V⚠Experimental
  `Vdd32.hf=vcvt(Vu32.f8)`
Q6_Whf_vcvt_Vb⚠Experimental
  `Vdd32.hf=vcvt(Vu32.b)`
Q6_Whf_vcvt_Vub⚠Experimental
  `Vdd32.hf=vcvt(Vu32.ub)`
Q6_Wqf32_vmpy_VhfVhf⚠Experimental
  `Vdd32.qf32=vmpy(Vu32.hf,Vv32.hf)`
Q6_Wqf32_vmpy_Vqf16Vhf⚠Experimental
  `Vdd32.qf32=vmpy(Vu32.qf16,Vv32.hf)`
Q6_Wqf32_vmpy_Vqf16Vqf16⚠Experimental
  `Vdd32.qf32=vmpy(Vu32.qf16,Vv32.qf16)`
Q6_Wsf_vadd_VhfVhf⚠Experimental
  `Vdd32.sf=vadd(Vu32.hf,Vv32.hf)`
Q6_Wsf_vcvt_Vhf⚠Experimental
  `Vdd32.sf=vcvt(Vu32.hf)`
Q6_Wsf_vmpy_VhfVhf⚠Experimental
  `Vdd32.sf=vmpy(Vu32.hf,Vv32.hf)`
Q6_Wsf_vmpyacc_WsfVhfVhf⚠Experimental
  `Vxx32.sf+=vmpy(Vu32.hf,Vv32.hf)`
Q6_Wsf_vsub_VhfVhf⚠Experimental
  `Vdd32.sf=vsub(Vu32.hf,Vv32.hf)`
Q6_Wub_vadd_WubWub_sat⚠Experimental
  `Vdd32.ub=vadd(Vuu32.ub,Vvv32.ub):sat`
Q6_Wub_vsub_WubWub_sat⚠Experimental
  `Vdd32.ub=vsub(Vuu32.ub,Vvv32.ub):sat`
Q6_Wuh_vadd_WuhWuh_sat⚠Experimental
  `Vdd32.uh=vadd(Vuu32.uh,Vvv32.uh):sat`
Q6_Wuh_vmpy_VubRub⚠Experimental
  `Vdd32.uh=vmpy(Vu32.ub,Rt32.ub)`
Q6_Wuh_vmpy_VubVub⚠Experimental
  `Vdd32.uh=vmpy(Vu32.ub,Vv32.ub)`
Q6_Wuh_vmpyacc_WuhVubRub⚠Experimental
  `Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub)`
Q6_Wuh_vmpyacc_WuhVubVub⚠Experimental
  `Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub)`
Q6_Wuh_vsub_WuhWuh_sat⚠Experimental
  `Vdd32.uh=vsub(Vuu32.uh,Vvv32.uh):sat`
Q6_Wuh_vunpack_Vub⚠Experimental
  `Vdd32.uh=vunpack(Vu32.ub)`
Q6_Wuh_vzxt_Vub⚠Experimental
  `Vdd32.uh=vzxt(Vu32.ub)`
Q6_Wuw_vadd_WuwWuw_sat⚠Experimental
  `Vdd32.uw=vadd(Vuu32.uw,Vvv32.uw):sat`
Q6_Wuw_vdsad_WuhRuh⚠Experimental
  `Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh)`
Q6_Wuw_vdsadacc_WuwWuhRuh⚠Experimental
  `Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh)`
Q6_Wuw_vmpy_VuhRuh⚠Experimental
  `Vdd32.uw=vmpy(Vu32.uh,Rt32.uh)`
Q6_Wuw_vmpy_VuhVuh⚠Experimental
  `Vdd32.uw=vmpy(Vu32.uh,Vv32.uh)`
Q6_Wuw_vmpyacc_WuwVuhRuh⚠Experimental
  `Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh)`
Q6_Wuw_vmpyacc_WuwVuhVuh⚠Experimental
  `Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh)`
Q6_Wuw_vrmpy_WubRubI⚠Experimental
  `Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1)`
Q6_Wuw_vrmpyacc_WuwWubRubI⚠Experimental
  `Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1)`
Q6_Wuw_vrsad_WubRubI⚠Experimental
  `Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1)`
Q6_Wuw_vrsadacc_WuwWubRubI⚠Experimental
  `Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1)`
Q6_Wuw_vsub_WuwWuw_sat⚠Experimental
  `Vdd32.uw=vsub(Vuu32.uw,Vvv32.uw):sat`
Q6_Wuw_vunpack_Vuh⚠Experimental
  `Vdd32.uw=vunpack(Vu32.uh)`
Q6_Wuw_vzxt_Vuh⚠Experimental
  `Vdd32.uw=vzxt(Vu32.uh)`
Q6_Ww_v6mpy_WubWbI_h⚠Experimental
  `Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):h`
Q6_Ww_v6mpy_WubWbI_v⚠Experimental
  `Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):v`
Q6_Ww_v6mpyacc_WwWubWbI_h⚠Experimental
  `Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):h`
Q6_Ww_v6mpyacc_WwWubWbI_v⚠Experimental
  `Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):v`
Q6_Ww_vadd_VhVh⚠Experimental
  `Vdd32.w=vadd(Vu32.h,Vv32.h)`
Q6_Ww_vadd_VuhVuh⚠Experimental
  `Vdd32.w=vadd(Vu32.uh,Vv32.uh)`
Q6_Ww_vadd_WwWw⚠Experimental
  `Vdd32.w=vadd(Vuu32.w,Vvv32.w)`
Q6_Ww_vadd_WwWw_sat⚠Experimental
  `Vdd32.w=vadd(Vuu32.w,Vvv32.w):sat`
Q6_Ww_vaddacc_WwVhVh⚠Experimental
  `Vxx32.w+=vadd(Vu32.h,Vv32.h)`
Q6_Ww_vaddacc_WwVuhVuh⚠Experimental
  `Vxx32.w+=vadd(Vu32.uh,Vv32.uh)`
Q6_Ww_vasrinto_WwVwVw⚠Experimental
  `Vxx32.w=vasrinto(Vu32.w,Vv32.w)`
Q6_Ww_vdmpy_WhRb⚠Experimental
  `Vdd32.w=vdmpy(Vuu32.h,Rt32.b)`
Q6_Ww_vdmpyacc_WwWhRb⚠Experimental
  `Vxx32.w+=vdmpy(Vuu32.h,Rt32.b)`
Q6_Ww_vmpa_WhRb⚠Experimental
  `Vdd32.w=vmpa(Vuu32.h,Rt32.b)`
Q6_Ww_vmpa_WuhRb⚠Experimental
  `Vdd32.w=vmpa(Vuu32.uh,Rt32.b)`
Q6_Ww_vmpaacc_WwWhRb⚠Experimental
  `Vxx32.w+=vmpa(Vuu32.h,Rt32.b)`
Q6_Ww_vmpaacc_WwWuhRb⚠Experimental
  `Vxx32.w+=vmpa(Vuu32.uh,Rt32.b)`
Q6_Ww_vmpy_VhRh⚠Experimental
  `Vdd32.w=vmpy(Vu32.h,Rt32.h)`
Q6_Ww_vmpy_VhVh⚠Experimental
  `Vdd32.w=vmpy(Vu32.h,Vv32.h)`
Q6_Ww_vmpy_VhVuh⚠Experimental
  `Vdd32.w=vmpy(Vu32.h,Vv32.uh)`
Q6_Ww_vmpyacc_WwVhRh⚠Experimental
  `Vxx32.w+=vmpy(Vu32.h,Rt32.h)`
Q6_Ww_vmpyacc_WwVhRh_sat⚠Experimental
  `Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat`
Q6_Ww_vmpyacc_WwVhVh⚠Experimental
  `Vxx32.w+=vmpy(Vu32.h,Vv32.h)`
Q6_Ww_vmpyacc_WwVhVuh⚠Experimental
  `Vxx32.w+=vmpy(Vu32.h,Vv32.uh)`
Q6_Ww_vrmpy_WubRbI⚠Experimental
  `Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1)`
Q6_Ww_vrmpyacc_WwWubRbI⚠Experimental
  `Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1)`
Q6_Ww_vsub_VhVh⚠Experimental
  `Vdd32.w=vsub(Vu32.h,Vv32.h)`
Q6_Ww_vsub_VuhVuh⚠Experimental
  `Vdd32.w=vsub(Vu32.uh,Vv32.uh)`
Q6_Ww_vsub_WwWw⚠Experimental
  `Vdd32.w=vsub(Vuu32.w,Vvv32.w)`
Q6_Ww_vsub_WwWw_sat⚠Experimental
  `Vdd32.w=vsub(Vuu32.w,Vvv32.w):sat`
Q6_Ww_vsxt_Vh⚠Experimental
  `Vdd32.w=vsxt(Vu32.h)`
Q6_Ww_vtmpy_WhRb⚠Experimental
  `Vdd32.w=vtmpy(Vuu32.h,Rt32.b)`
Q6_Ww_vtmpyacc_WwWhRb⚠Experimental
  `Vxx32.w+=vtmpy(Vuu32.h,Rt32.b)`
Q6_Ww_vunpack_Vh⚠Experimental
  `Vdd32.w=vunpack(Vu32.h)`
Q6_Ww_vunpackoor_WwVh⚠Experimental
  `Vxx32.w|=vunpacko(Vu32.h)`
Q6_vgather_AQRMVh⚠Experimental
  `if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vv32.h).h`
Q6_vgather_AQRMVw⚠Experimental
  `if (Qs4) vtmp.w=vgather(Rt32,Mu2,Vv32.w).w`
Q6_vgather_AQRMWw⚠Experimental
  `if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h`
Q6_vgather_ARMVh⚠Experimental
  `vtmp.h=vgather(Rt32,Mu2,Vv32.h).h`
Q6_vgather_ARMVw⚠Experimental
  `vtmp.w=vgather(Rt32,Mu2,Vv32.w).w`
Q6_vgather_ARMWw⚠Experimental
  `vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h`
Q6_vmem_QRIV⚠Experimental
  `if (Qv4) vmem(Rt32+#s4)=Vs32`
Q6_vmem_QRIV_nt⚠Experimental
  `if (Qv4) vmem(Rt32+#s4):nt=Vs32`
Q6_vmem_QnRIV⚠Experimental
  `if (!Qv4) vmem(Rt32+#s4)=Vs32`
Q6_vmem_QnRIV_nt⚠Experimental
  `if (!Qv4) vmem(Rt32+#s4):nt=Vs32`
Q6_vscatter_QRMVhV⚠Experimental
  `if (Qs4) vscatter(Rt32,Mu2,Vv32.h).h=Vw32`
Q6_vscatter_QRMVwV⚠Experimental
  `if (Qs4) vscatter(Rt32,Mu2,Vv32.w).w=Vw32`
Q6_vscatter_QRMWwV⚠Experimental
  `if (Qs4) vscatter(Rt32,Mu2,Vvv32.w).h=Vw32`
Q6_vscatter_RMVhV⚠Experimental
  `vscatter(Rt32,Mu2,Vv32.h).h=Vw32`
Q6_vscatter_RMVwV⚠Experimental
  `vscatter(Rt32,Mu2,Vv32.w).w=Vw32`
Q6_vscatter_RMWwV⚠Experimental
  `vscatter(Rt32,Mu2,Vvv32.w).h=Vw32`
Q6_vscatteracc_RMVhV⚠Experimental
  `vscatter(Rt32,Mu2,Vv32.h).h+=Vw32`
Q6_vscatteracc_RMVwV⚠Experimental
  `vscatter(Rt32,Mu2,Vv32.w).w+=Vw32`
Q6_vscatteracc_RMWwV⚠Experimental
  `vscatter(Rt32,Mu2,Vvv32.w).h+=Vw32`